Parallel Breadth - First BDD

With the increasing complexity of protocol and circuit designs , formal veriication has become an important research area and binary decision diagrams (BDDs) have been shown to be a powerful tool in formal veriication. This paper presents a parallel algorithm for BDD construction targeted at shared memory multiprocessors and distributed shared memory systems. This algorithm focuses on improving memory access locality through specialized memory managers and partial breadth-rst expansion, and on improving processor utilization through dynamic load balancing. The results on a shared memory system show speedups of over two on four processors and speedups of up to four on eight processors. The measured results clearly identify the main source of bottlenecks and point out some interesting directions for further improvements. 1 Introduction With the increasing complexity of protocol and circuit designs , formal veriication has become an important research area. As an example, in 1994, Intel's famous Pentium division bug (which caused a pretax charge of $475 million to Intel's revenue) clearly demonstrated the demands for more powerful veriication tools. Binary decision diagrams (BDDs) have been shown to be a powerful tool in formal veriication 5]. BDDs have proven to be so useful because they provide a unique and compact symbolic representation of a Boolean function. Compactness is important because it allows us to represent large functions. Uniqueness is important because it allows us to easily test two Boolean functions for equivalence. For example, both the speciication and the